In this report, we evaluate the resource usage and performance of the CHO benchmark applications using the Intel FPGA SDK for OpenCL and Nallatech 385A FPGA board that features an Arria 10 FPGA device. Using Altera OpenCL (AOCL) compiler to synthesize the benchmark applications, they listed the resource usage and performance of each kernel that can be successfully synthesized by the compiler. The authors presented CHO as an OpenCL port of the CHStone benchmark.
CHO is a suite of benchmark applications that provides support for OpenCL. Benchmarking of OpenCL-based framework is an effective way for analyzing the performance of system by studying the execution of the benchmark applications. It can also significantly reduce the hardware development time as users can evaluate different ideas with high-level language without deep FPGA domain knowledge.
#Gpu opencl benchmark list software#
The approach makes the more » FPGA-based development more accessible to software users as the needs for hybrid computing using CPUs and FPGAs are increasing. Users can focus on the design of hardware-accelerated kernel functions in OpenCL and then direct the tools to generate the low-level FPGA implementations. The Intel FPGA SDK for OpenCL is a suite of tools that allows developers to abstract away the complex FPGA-based development flow for a high-level software development flow.
#Gpu opencl benchmark list portable#
OpenCL extends the C-based programming language for developing portable codes on different platforms such as CPU, Graphics processing units (GPUs), Digital Signal Processors (DSPs) and Field Programmable Gate Arrays (FPGAs). The OpenCL standard is an open programming model for accelerating algorithms on heterogeneous computing system. In terms of system software, we depend on the vendor performance tools to support the desired programming model and runtime to be able to measure the metrics of = , In terms of algorithms, we need to carefully construct the benchmarks and appropriately use the concurrency available on a platform. Additionally, we discuss the challenges to measure performance portability associated with algorithms and system software. We argue that the standard deviation gives additional insight into performance portability assessment since it adds the performance variability across platforms. To help distinguish between these instances, we extend the metric by adding the standard deviation of the performance efficiencies for each benchmark. We found that the delivered performance portability is similar for several benchmarks, even if the roofline-based performance efficiencies across platforms are very different among the benchmarks. We apply the metric defined by Pennycook et al., and we use roofline efficiency from the Roofline performance model as the "performance efficiency" in the metric's definition. The Rodinia benchmark suite is used for this evaluation. We evaluate the capabilities of vendor-provided OpenCL implementations for performance portability across multiple computing platforms.
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